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max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 19-4686; rev 2; 4/13 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maximintegrated.com. general description the max16056?ax16059 are ultra-low-current 125na (typ) microprocessor (?) supervisory circuits that mon- itor a single system supply voltage. these devices assert an active-low reset signal whenever the v cc supply voltage drops below the factory-trimmed reset threshold, manual reset is pulled low, or the watchdog timer runs out (max16056/max16058). the reset output remains asserted for an adjustable reset timeout period after v cc rises above the reset threshold. factory- trimmed reset threshold voltages are offered from 1.575v to 4.625v in approximately 100mv increments (see table 1). these devices feature adjustable reset and watchdog timeout using external capacitors. the max16056/ max16058 contain a watchdog timer with a watchdog select input (wds) that multiplies the watchdog timeout period by 128. the max16057/max16059 do not have the watchdog feature. the max16056?ax16059 are available in either push- pull or open-drain output-type configurations (see the ordering information ). these devices are fully specified over the -40? to +125? automotive temperature range. the max16056/max16058 are available in the 8-pin tdfn package, and the max16057/max16059 are avail- able in the 6-pin tdfn package. applications portable/battery-powered equipment pdas/cell phones mp3 players/pagers glucose monitors/patient monitors metering/hvac features ultra-low 125na (typ) supply current 1.1v to 5.5v operating supply range factory-set reset threshold options from 1.575v to 4.625v in approximately 100mv increments capacitor-adjustable reset timeout capacitor-adjustable watchdog timeout (max16056/max16058) watchdog timer capacitor open detect function optional watchdog disable function (max16056/max16058) manual reset input guaranteed reset valid for v cc 1.1v push-pull or open-drain reset output options power-supply transient immunity small, 3mm x 3mm tdfn package 1 12 3 65 4 34 865 v cc wdi srt max16056 max16058 max16057 max16059 2 7 wds v cc srt n.c. reset swt ep ep mr gnd tdfn top view tdfn reset *connect exposed pad to gnd. mr gnd pin configurations ordering information part pin- package reset output watch- dog timer max16056 ata_ _+t 8 tdfn-ep* push-pull yes max16057 att_ _+t 6 tdfn-ep* push-pull no max16058 ata_ _+t 8 tdfn-ep* open-drain yes max16059 att_ _+t 6 tdfn-ep* open-drain no note: all devices are specified over the -40? to +125? oper- ating temperature range. +denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. *ep = exposed pad. ? _?represents the two number suffix needed when ordering the reset threshold voltage value (see table 1). standard versions and their package top marks are shown in table 3 at the end of data sheet. typical operating circuit appears at end of data sheet.
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 2 maxim integrated absolute maximum ratings electrical characteristics (v cc = 1.2v to 5.5v, t a = t min to t max , unless otherwise noted. typical values are at v cc = 3.3v, t a = +25?.) (note 2) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . v cc to gnd ..............................................................-0.3v to +6v srt, swt, wds, mr , wdi, to gnd ...........-0.3v to (v cc + 0.3v) reset (push-pull) to gnd .........................-0.3v to (v cc + 0.3v) reset (open-drain) to gnd ...................................-0.3v to +6v input current (all pins) .................................................... ?0ma output current ( reset ) ................................................. ?0ma continuous power dissipation (t a = +70?) 6-pin tdfn (derate 23.8mw/? above +70?) .........1905mw 8-pin tdfn (derate 24.4mw/? above +70?) .........1951mw junction-to-ambient thermal resistance ( ja ) (note 1) 6-pin tdfn ...................................................................42?/w 8-pin tdfn ...................................................................41?/w junction-to-case thermal resistance ( jc ) (note 1) 6-pin tdfn .....................................................................9?/w 8-pin tdfn .....................................................................8?/w operating temperature range .........................-40? to +125? storage temperature range .............................-65? to +150? junction temperature .....................................................+150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) .......................................+260? parameter symbol conditions min typ max units t a = 0? to +125? 1.1 5.5 supply voltage v cc t a = -40? to 0? 1.2 5.5 v v cc = 5.0v, t a = -40? to +85? 142 210 v cc = 3.3v, t a = -40? to +85? 132 185 v cc = 1.8v, t a = -40? to +85? 125 175 v cc = 5.0v, t a = -40? to +125? 142 430 v cc = 3.3v, t a = -40? to +125? 132 415 v cc > v th + 150mv, no load, reset output deasserted (note 3) v cc = 1.8v, t a = -40? to +125? 125 400 na supply current i cc v cc < v th , no load, reset output asserted 7 15 a t a = +25? v th - 1.5% v th + 1.5% v cc reset threshold v th v cc falling (see table 1) t a = -40? to +125? v th - 2.5% v th + 2.5% v hysteresis v hyst v cc rising 0.5 % v cc to reset delay t rd v cc falling from (v th + 100mv) to (v th - 100mv) at 10mv/? 80 ? reset timeout period t rp c srt = 2700pf (note 4) 10.5 14.18 17.0 ms
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 3 maxim integrated note 2: devices are production tested at t a = +25?. specifications over temperature limits are guaranteed by design. note 3: wdi input period is 1s with t rise and t fall < 50ns. note 4: worst case of srt ramp current and voltage is used to guarantee minimum and maximum limits. note 5: guaranteed by design, not production tested. parameter symbol conditions min typ max units t a = -40? to +125? 197 240 282 srt ramp current i ramp1 v s rt = 0v to v r am p 1 , v c c = 1.6v to 5v t a = +25? 210 240 270 na srt ramp threshold v ramp1 v cc = 1.6v to 5v (v ramp rising) 1.173 1.235 1.297 v t a = +25? 5 6.4 8 watchdog timeout clock period t wdper t a = -40? to +125? 3.5 6.4 9.5 ms t a = -40? to +125? 197 240 282 swt ramp current i ramp2 v s wt = 0v to v ram p 2 , v c c = 1.6v to 5v t a = +25? 210 240 270 na swt ramp threshold v ramp2 v cc = 1.6v to 5v (v ramp2 rising) 1.173 1.235 1.297 v v cc 1.0v, i sink = 50? 0.3 v cc 2.7v, i sink = 1.2ma 0.3 v ol v cc 4.5v, i sink = 3.2ma 0.4 v cc 1.8v, i source = 200? 0.8 x v cc v cc 2.25v, i source = 500? 0.8 x v cc reset output voltage v oh max16056/max16057 v cc 4.5v, i source = 800? 0.8 x v cc v reset output-leakage current, open drain i lkg v cc > v th , reset not asserted, v reset = 5.5v (max16058/max16059) 1.0 ? v ih 0.7 x v cc input-logic levels v il 0.3 x v cc v mr minimum pulse width t mpw 1s mr glitch rejection 200 ns mr to reset delay t mrd 250 ns wdi minimum pulse width (note 5) 150 ns input leakage current mr , wdi, wds is connected to gnd or v cc -100 +100 na electrical characteristics (continued) (v cc = 1.2v to 5.5v, t a = t min to t max , unless otherwise noted. typical values are at v cc = 3.3v, t a = +25?.) (note 2)
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 4 maxim integrated normalized reset threshold voltage vs. temperature max16056 toc07 temperature ( n c) normalized v th 110 95 -25 -10 5 35 50 65 20 80 0.985 0.990 0.995 1.000 1.005 1.010 1.015 1.020 0.980 -40 125 typical operating characteristics (v cc = 2.5v, t a = +25?, unless otherwise noted.) supply current vs. supply voltage max16056 toc01 v cc ( v ) i cc ( f a) 3.5 4.0 4.5 5.0 10.0 1.0 0.1 1.0 1.5 2.0 2.5 3.0 5.5 v th = 2.23v t a = +125 n c t a = +85 n c t a = +25 n c t a = -40 n c supply current vs. temperature max16056 toc02 temperature ( n c) supply current (na) 110 95 80 65 50 35 20 5 -10 -25 50 100 150 200 250 300 350 0 -40 125 reset is not asserted v th = 1.575v v cc = 3.3v v cc = 2.5v v cc = 5.5v v cc = 1.8v reset timeout period vs. c srt max16056 toc03 c srt (nf) t rp (s) 250 200 150 100 50 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 0 300 v cc to reset delay vs. temperature max16056 toc08 temperature ( n c) t rd ( f s) 110 95 80 65 50 35 20 5 -10 -25 60 70 80 90 100 110 120 50 -40 125 v cc = v th + 100mv to v th - 100mv normalized reset timeout period vs. temperature max16056 toc04 temperature ( n c) normalized t rp 110 95 65 80 -10 5 20 35 50 -25 0.92 0.94 0.96 0.98 1.00 1.02 1.04 1.06 1.08 1.10 0.90 -40 125 normalized watchdog timeout period vs. temperature max16056 toc05 temperature ( n c) normalized t wd 110 95 65 80 -10 5 20 35 50 -25 0.96 0.97 0.98 0.99 1.00 1.01 1.02 1.03 1.04 1.05 0.95 -40 125 maximum v cc transient duration vs. reset threshold overdrive max16056 toc06 reset threshold overdrive (mv) transient duration ( f s) 100 10 100 1000 1 10 1000 reset occurs above this line v cc falling from v th + 100mv
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 5 maxim integrated _______________________________________________________________________________________________________ 5 reset output-low voltage vs. sink current max16056 toc09 i sink (ma) v ol (v) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.05 0.10 0.15 0.20 0.25 0.30 0 0 5.0 v cc = 1.8v v cc = 2.5v v cc = 3.3v reset output-high voltage vs. source current max16056 toc10 i source (ma) output-high voltage (v cc -v oh ) (v) 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 0.9 0.8 0.6 0.7 0.2 0.3 0.4 0.5 0.1 0 1.0 v cc = 1.8v v cc = 2.5v v cc = 3.3v supply current vs. watchdog switching frequency max16056 toc11 watchdog switching frequency (khz) supply current ( f a) 1000 100 10 1 0.1 0.4 0.3 0.5 0.6 0.7 0.8 0.9 1.0 0.2 0.1 0 0.01 10,000 typical operating characteristics (continued) (v cc = 2.5v, t a = +25?, unless otherwise noted.) reset sink capability vs. supply voltage max16056 toc14 v cc (v) sink current (ma) 3.5 3.0 2.0 2.5 1.0 1.5 0.5 1 2 3 4 5 6 7 8 9 10 0 0 4.0 v reset = 0.3v reset source capability vs. supply voltage max16056 toc15 v cc (v) source current (ma) 5.0 4.5 2.5 3.0 3.5 4.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2.0 5.5 v reset = 0.8 x v cc manual reset delay vs. temperature max16056 toc12 temperature ( n c) t mrd (ns) 110 95 65 80 -10 5 20 35 50 -25 252 254 256 258 260 262 264 266 268 270 250 -40 125 manual reset delay max16056 toc13 reset 1v/div mr 1v/div 200ns/div
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 6 maxim integrated pin description pin max16056/ max16058 max16057/ max16059 name function 11 reset push-pull or open-drain reset output. reset asserts whenever v cc drops below the selected reset threshold voltage (v th ) or manual reset is pulled low. reset remains low for the reset timeout period after all reset conditions are deasserted, and then goes high. the watchdog timer triggers a reset pulse (t rp ) whenever a watchdog fault occurs (max16056/max16058). 2 2 gnd ground 3 swt watchdog timeout input. connect a capacitor between swt and gnd to set the basic watchdog timeout period (t wd ). determine the period by the formula t wd = floor[c swt x 5.15 x 10 6 /6.4ms] x 6.4ms + 3.2ms (note 6) with t wd in seconds and c swt in farads, or use table 2. extend the basic watchdog timeout period by using the wds input. connect swt to ground to disable the watchdog timer function. the value of the capacitor must be between 2275pf and 0.54? to have a valid watchdog timeout period. 43 mr manual-reset input. drive mr low to manually reset the device. reset remains asserted for the reset timeout period after mr is released. there is no internal pullup on mr . mr must not be left unconnected. connect mr to v cc if not used. 5 4 srt reset timeout input. connect a capacitor from srt to gnd to select the reset timeout period. determine the period as follows: t rp = 5.15 x 10 6 x c srt with t rp in seconds and c srt in farads, or use table 2. the value of the capacitor must be between 39pf and 4.7?. 6 wdi watchdog input. a falling transition must occur on wdi within the selected watchdog timeout period or a reset pulse occurs. the watchdog timer clears when a falling transition occurs on wdi or whenever reset is asserted. connect swt to ground to disable the watchdog timer function. 7 wds watchdog select input. wds selects the watchdog timeout mode. connect wds to ground to select normal mode. the watchdog timeout period is t wd . connect wds to v cc to select extended mode, multiplying the basic timeout period (t wd ) by a factor of 128. a change in the state of wds clears the watchdog timer. 86v cc supply voltage. v cc is the power-supply input and the input for fixed threshold v cc monitor. for noisy systems, bypass v cc with a 0.1? capacitor to gnd. 5 n.c. no connection. not internally connected. ep exposed pad. connect ep to gnd or leave unconnected. note 6: floor: take the integral value.
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 7 maxim integrated detailed description the max16056?ax16059 are ultra-low-current 125na (typ) ? supervisory circuits that monitor a single sys- tem supply voltage. these devices assert an active-low reset signal whenever the v cc supply voltage drops below the factory-trimmed reset threshold, manual reset is pulled low, or the watchdog timer runs out (max16056/max16058). the reset output remains asserted for an adjustable reset timeout period after v cc rises above the reset threshold. the reset and watchdog delay periods are adjustable using external capacitors. reset output the max16056?ax16059 ? supervisory circuits assert a reset to prevent code-execution errors during power- up, power-down, and brownout conditions. the reset output is guaranteed to be valid for v cc down to 1.1v. when v cc falls below the reset threshold, the reset output asserts low. once v cc exceeds the reset thresh- old plus the hysteresis, an internal timer keeps the reset output asserted for the capacitor-adjusted reset timeout period (t rp ), then after this interval the reset output deasserts (see figure 1). the reset function features immunity to power-supply voltage transients. manual-reset input ( mr ) many ?-based products require manual-reset capabil- ity, allowing the operator, a test technician, or external logic circuitry to initiate a reset. the max16056 max16059 feature an mr input. a logic-low on mr asserts a reset. reset remains asserted while mr is low and for the timeout period, t rp , after mr returns high. connect mr to v cc if unused. mr can be driven with cmos logic levels or with open-drain/collector out- puts (with a pullup resistor). connect a normally open momentary switch from mr to gnd and a resistor from mr to v cc to implement a manual-reset function; exter- nal debounce circuitry is not required. if mr is driven by long cables or the device is used in a noisy environ- ment, connect a 0.1? capacitor from mr to gnd to provide additional noise immunity. watchdog timer the max16056/max16058? watchdog timer circuitry monitors the ?? activity. if the ? does not toggle (high-to-low) the watchdog input (wdi) within the capacitor-adjustable watchdog timeout period (t wd ), reset asserts for the reset timeout period (t rp ). the internal watchdog timer is cleared by: 1) any event that asserts reset , by 2) a falling transition at wdi (that can detect pulses as short as 150ns) or by 3) a transi- tion (high-to-low or low-to-high) at wds. while reset is asserted, the watchdog timer remains cleared and does not count. as soon as reset deasserts, the watch- dog timer resumes counting. there are two modes of watchdog operation, normal mode and extended mode. in normal mode (figure 2), the watchdog timeout period is determined by the value of the capacitor connected between swt and ground. in extended mode (figure 3), the watchdog timeout period is multiplied by 128. for example, in extended mode, a 0.33? capacitor gives a watchdog timeout period of 217s (see table 2). to disable the watchdog timer function, connect swt to ground. when v cc ramps above v th + v hyst , the value of the external swt capacitor is sampled after reset goes high. when sampling is finished, the capacitor value is stored in the device and is used to set watchdog time- out. if reset goes low before sampling is finished, the device interrupts sampling, and sampling is restarted when reset goes high again. if the external swt capacitor is less than 470pf, the sampling result sets the watchdog timeout to zero. this causes the watchdog to assert reset continuously after sampling is finished. if a pcb manufacturing defect caused the connection to c swt to be broken, the capacitance is very low and reset is continuously asserted. if the external swt capacitor is greater than 0.47?, the sampling result sets the watchdog timeout to be infinite, disabling the watchdog function.
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 8 maxim integrated figure 1. reset timing relationship v cc t rp t rp t mrd t mpw t rd v th + v hyst reset mr v th figure 3. watchdog timing diagram, extended mode, wds = v cc t wd x 128 t rp v cc v cc 0v 0v wdi reset extended mode (wds = v cc ) figure 2. watchdog timing diagram, normal mode, wds = gnd t wd t rp v cc v cc 0v 0v wdi reset normal mode (wds = gnd)
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 9 maxim integrated applications information selecting the reset timeout capacitor the reset timeout period is adjustable to accommodate a variety of ? applications. to adjust the reset timeout period (t rp ), connect a capacitor (c srt ) between srt and ground. the reset timeout capacitor is calculated as follows: c srt = t rp /(5.15 x 10 6 ) with t rp in seconds and c srt in farads. c srt must be a low-leakage (< 10na) type capacitor. a ceramic capacitor with low temperature coefficient dielectric (i.e., x7r) is recommended. selecting watchdog timeout capacitor the watchdog timeout period is adjustable to accom- modate a variety of ? applications. with this feature, the watchdog timeout can be optimized for software execution. the programmer can determine how often the watchdog timer should be serviced. adjust the watchdog timeout period (t wd ) by connecting a capaci- tor (c swt ) between swt and gnd. for normal mode operation, calculate the watchdog timeout as follows: t wd = floor[c swt x 5.15 x 10 6 /6.4ms] x 6.4ms + 3.2ms with t wd in seconds and c swt in farads. (floor: take the integral value) (figures 2 and 3) the maximum t wd is 296s. if the capacitor sets t wd greater than the 296s, t wd = infinite and the watchdog timer is disabled. c swt must be a low-leakage (< 10na) type capacitor. a ceramic capacitor with low temperature coefficient dielectric (i.e., x7r) is recommended. watchdog timeout accuracy the watchdog timeout period is affected by the swt ramp current (i ramp2 ) accuracy, the swt ramp thresh- old (v ramp2 ) and the watchdog timeout clock period (t wdper ). in the equation above, the constant 5.15 x 10 6 is equal to v ramp2 /i ramp2 , and 6.4ms equals the watchdog timeout clock period. calculate the timeout accuracy by substituting the minimum, typical, and maximum values into the equation. for example, if c swt = 100nf. t wdmin = floor[100 x 10 -9 x 1.173/(282 x 10 -9 )/9.5ms] x 3.5ms + 0.5 x 3.2ms = 141.7ms t wdnom = floor[100 x 10 -9 x 1.235/(240 x 10 -9 )/6.4ms] x 6.4ms + 0.5 x 6.4ms = 515.2ms t wdmax = floor[100 x 10 -9 x 1.297/(197 x 10 -9 )/3.5ms] x 9.5ms + 0.5 x 9.5ms = 1790.75ms transient immunity for applications with higher slew rates on v cc during power-up, additional bypass capacitance may be required. the max16056?ax16059 are relatively immune to short-duration supply voltage transients, or glitches on v cc . the maximum v cc transient duration vs. reset threshold overdrive graph in the typical operating characteristics shows this transient immunity. the area below the curve of the graph is the region where these devices typically do not generate a reset pulse. this graph was generated using a falling pulse applied to v cc , starting 100mv above the actual reset threshold (v th ) and ending below this threshold (reset threshold overdrive). as the magnitude of the transient increases, the maximum allowable pulse width decreases. typically, a 100mv v cc transient duration of 40? or less does not cause a reset. using the max16056?ax16059 for reducing system power consumption using the reset output to control an external p-channel mosfet to control the on-time of a power supply can result in lower system power consumption in systems that can be regularly put to sleep. by tying the wdi input to ground, the reset output becomes a low-frequency clock output. when reset is low, the mosfet is turned on and power is applied to the system. when reset is high, the mosfet is turned off and no power is con- sumed by the system. this effectively reduces the shut- down current of the system to zero (figure 4).
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 10 maxim integrated figure 4. using max16056?ax16059 to reduce system power consumption mr swt srt gnd wds wdi bat 0.1 f 0.1 f p manual power-on 1m c swt c srt max16056 reset v cc v cc1 v cc reset t rp v cc1 t rp t wd
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 11 maxim integrated interfacing to other voltages for logic compatibility the open-drain reset output can be used to interface to a ? with other logic levels. the open-drain output is connected to a voltage from 0v to 5.5v as shown in figure 5. generally, the pullup resistor connected to reset connects to the supply voltage that is being monitored at the device? v cc input. however, some systems use the open-drain output to level-shift from the supervisor? monitored supply to another supply voltage. as the supervisor? v cc decreases, so does the device? ability to sink current at reset . ensuring a valid reset down to v cc = 0v (push-pull reset ) when v cc falls below 1.1v, the current-sinking capabil- ity of reset decreases drastically. the high-imped- ance cmos logic inputs connected to reset can drift to undetermined voltages. this presents no problems in most applications, since most ?s and other circuitry do not operate with v cc below 1.1v. in those applica- tions where reset must be valid down to 0, add a pull- down resistor between the max16056/max16057 push-pull reset output and gnd. the resistor sinks any stray leakage currents, holding reset low (figure 6). choose a pulldown resistor that accommodates leakages, such that reset is not significantly loaded and is capable of pulling to gnd. the external pull- down cannot be used with the open-drain reset out- put of the max16058/max16059. figure 5. interfacing with other voltage levels 5v gnd p reset 100k 3.3v max16058 max16059 v cc v cc gnd reset figure 6. ensuring reset valid to v cc = gnd v cc v cc gnd reset 2m max16056 max16057
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 12 maxim integrated v cc threshold falling (v) suffix min typ max 46 4.509 4.625 4.741 45 4.388 4.500 4.613 44 4.266 4.375 4.484 43 4.193 4.300 4.408 42 4.095 4.200 4.305 41 3.998 4.100 4.203 40 3.900 4.000 4.100 39 3.802 3.900 3.998 38 3.705 3.800 3.895 37 3.608 3.700 3.793 36 3.510 3.600 3.690 35 3.413 3.500 3.588 34 3.315 3.400 3.485 33 3.218 3.300 3.383 32 3.120 3.200 3.280 31 2.998 3.075 3.152 30 2.925 3.000 3.075 29 2.852 2.925 2.998 28 2.730 2.800 2.870 27 2.633 2.700 2.768 26 2.559 2.625 2.691 25 2.438 2.500 2.563 24 2.340 2.400 2.460 23 2.255 2.313 2.371 225 2.180 2.235 2.290 22 2.133 2.188 2.243 21 2.048 2.100 2.153 20 1.950 2.000 2.050 19 1.853 1.900 1.948 18 1.755 1.800 1.845 17 1.623 1.665 1.707 16 1.536 1.575 1.614 table 1. threshold suffix guide
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 13 maxim integrated capacitance (pf) t rp (ms) t wd (ms) t wd x 128 (ms) 39 47 56 68 82 100 120 150 180 220 270 330 390 470 0 (no capacitor is connected) 560 680 820 1000 1200 1500 1800 2200 not recommended indeterminate (0, 9.6, or 16) indeterminate (0, 1228.8, or 1636) 2700 14.18 16 1641 3300 16.99 16 1641 3900 20.1 22.4 2460 4700 24.21 22.4 2460 5600 28.84 28.8 3280 6800 35.00 35.2 4099 8200 42.23 41.6 4918 10,000 51.5 54.4 6556 12,000 61.8 60.8 7376 15,000 77.25 80 9833 18,000 92.7 92.8 11,472 table 2. capacitor selection guide
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 14 maxim integrated capacitance (pf) t rp (ms) t wd (ms) t wd x 128 (ms) 22,000 113.3 112 13,929 27,000 139.05 137.6 17,206 33,000 169.95 169.6 21,302 39,000 200.85 201.6 25,398 47,000 242.05 240 30,313 56,000 288.4 291.2 36,867 68,000 350.2 348.8 44,240 82,000 422.3 419.2 53,251 100,000 515 515.2 65,539 120,000 618 617.6 78,646 150,000 772.5 771.2 98,307 180,000 927 924.8 117,968 220,000 1133 1129.6 144,182 270,000 1390.5 1392 177,769 330,000 1699.5 1699.2 217,091 390,000 2008.5 2006.4 256,412 470,000 2420.5 2416 308,841 680,000 3502 820,000 4223 1,000,000 5150 1,500,000 7725 2,200,000 11,330 indeterminate (may be infinite and watchdog is disabled) 3,300,000 16,995 4,700,000 24,205 infinite (watchdog is disabled) table 2. capacitor selection guide (continued)
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 15 maxim integrated part top mark max16056ata17+ bkz max16056ata23+ bla max16056ata26+ blb max16056ata29+ blc max16056ata31+ bld max16056ata46+ ble max16057att17+ atq max16057att23+ atr max16057att26+ ats max16057att29+ att max16057att31+ auc max16057att46+ aud max16058ata16+ blf max16058ata22+ blg max16058ata26+ blh max16058ata29+ bli max16058ata31+ blj max16058ata44+ blk max16059att16+ atw max16059att22+ atx max16059att26+ aty max16059att29+ atz max16059att31+ aua max16059att44+ aub table 3. standard versions
max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts 16 maxim integrated chip information process: bicmos mr swt srt gnd wds wdi bat 0.1 f p manual reset 1m c swt c srt max16056 reset v cc v cc typical operating circuit package type package code outline no. land pattern no. 8 tdfn-ep t833-2 21-0137 90-0059 6 tdfn-ep t633-2 21-0137 90-0058 package information for the latest package outline information and land patterns (foot- prints), go to www.maximintegrated.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status.
maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integr ated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifications without notice at any time . the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 ________________________________ 17 2013 maxim integrated products, inc. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products , inc. max16056?ax16059 125na supervisory circuits with capacitor- adjustable reset and watchdog timeouts revision history revision number revision date description pages changed 0 6/09 initial release ? 1 6/10 updated absolute maximum ratings , electrical characteristics , and table 3. 2, 3, 15 2 4/13 removed automotive infotainment from applications sections 1

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